The tides are shifting in semiconductor security, and ZeroRISC is positioning itself at the crest of the wave. With the announcement of a $10 million oversubscribed seed round led by Fontinalis Partners—joined by a host of respected names including Fundomo, Analog Devices co-founder Ray Stata, SemiAnalysis founder Dylan Patel, and others—the company is cementing its role as a central figure in the emerging domain of open-source silicon security. At the heart of ZeroRISC’s mission is a departure from opaque, black-box silicon systems, in favor of fully auditable and secure-by-design architectures that begin with the chip itself.
This is not the first time Dominic Rizzo, ZeroRISC’s CEO and founder, has changed the conversation. As the originator of the OpenTitan project in 2019—the world’s first open-source silicon root of trust (RoT) and a Google-led initiative that has since seen wide commercial availability—Rizzo has long championed the idea that openness is not a vulnerability, but a strength. That ethos now underpins ZeroRISC’s Integrity Management Platform (IMP), which enables security controls to be defined at the software level, decoupled from the geopolitical or manufacturing context of the physical device. What this means is that enterprises, from IoT vendors to hyperscalers, can finally govern device behavior on their terms without ceding trust to third-party hardware vendors or closed-source firmware.
This shift comes at a time when regulatory frameworks are demanding greater manufacturer accountability for hardware security, and cyber insurance premiums are climbing in response to the growing threat landscape. With ZeroRISC’s platform, CISOs and security architects are granted end-to-end oversight and cryptographic assurance—from chip design to field deployment—without needing to physically own the entire supply chain. This is especially critical in an era where attacks target the firmware and hardware layers as much as, or more than, the operating system or application tier. ZeroRISC’s use of OpenTitan ensures that even the earliest stages of chip design are subject to rigorous, transparent validation—a stark contrast to the proprietary cores that dominate the market today.
The broader implications go well beyond enterprise security. With AI-generated deepfakes and data poisoning attacks entering public consciousness, ZeroRISC’s supporters argue that verifiable, tamper-evident hardware will be essential infrastructure. The notion of “end-to-end attestation”—knowing not only the software stack but the authenticity of the raw data and model that produced it—is becoming increasingly urgent, and ZeroRISC is poised to meet that challenge.
The company’s first commercially available chip based on OpenTitan, manufactured by Nuvoton and introduced earlier this year, is already drawing interest from OEMs and SoC vendors alike. It marks a transition from ideology to product: from evangelizing open silicon to delivering it. Through its early access program, ZeroRISC is inviting partners to engage with this secure root-of-trust platform, signaling that it intends to scale quickly and embed itself at every layer of the silicon value chain.
With a team that bridges deep technical credibility and market readiness, and backing from some of the most respected names in hardware, semiconductors, and systems security, ZeroRISC is not merely riding a trend—it is shaping the architecture of trust in an increasingly uncertain digital world.
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